Correction to “A Nonvolatile Fast-Read Two-Transistor SRAM Based on Spintronic Devices” [Dec 17 93-100]

Spintronic Nano-Devices for Nonvolatile VLSIs

I review physics and materials science of nanoscale spintronic devices being developed for nonvolatile VLSI [1]. VLSIs can be made high performance and yet standby-power free by using magnetic tunnel junction, a two-terminal spintronic device, in combination with current CMOS technology. The scalability of perpendicular magnetic tunnel junctions utilizing CoFeB-MgO [2] is passing the 20 nm dime...

MTJ-Based Nonvolatile 9T SRAM Cell

This paper presents a spin-transfer torquemagnetic tunnel junction (STT-MTJ) based non-volatile 9-transistor (9T) SRAM cell. The cell achieves low power dissipation due to its series connected MTJ elements and read buffer which offer stacking effect. The paper studies the impact of PVT (process, voltage, and temperature) variations on the design metric of the SRAM cell such as write delay and c...

Flexible spintronic devices on Kapton

Nonvolatile read-out molecular memory.

A versatile molecule is described that performs as a nondestructible read-out optical-storage molecular memory. This molecular memory is composed of two distinct molecules that are chemically bonded to each other to form a single molecule with unique properties. One component is a photochromic fulgimide, and the other is a strongly fluorescing oxazine dye. This composite molecule was specifical...

A Sub-threshold 9T SRAM Cell with High Write and Read ability with Bit Interleaving Capability

This paper proposes a new sub-threshold low power 9T static random-access memory (SRAM) cell compatible with bit interleaving structure in which the effective sizing adjustment of access transistors in write mode is provided  by isolating writing and reading paths. In the proposed cell, we consider a weak inverter to make better write mode operation. Moreover applying boosted word line feature ...